1. Technical Field
Embodiments described herein are related to the field of integrated circuit implementation, and more particularly to the implementation of circuits for sampling signals.
2. Description of the Related Art
Computing systems may include one or more systems-on-a-chip (SoC), which may integrate a number of different functions, such as, graphics processing, onto a single integrated circuit. With numerous functions included in a single integrated circuit, chip count may be kept low in mobile computing systems, such as tablets, for example, which may result in reduced assembly costs, and a smaller form factor for such mobile computing systems.
Since many functional blocks, such as memories, timers, serial ports, phase-locked loops (PLLs), analog-to-digital converters (ADCs) and more, may be included in an SoC, the probability that a given functional block is not in use at a given time may be high. When a functional block is not in use, the SoC may turn the block off by disabling power to it, thereby conserving power, reducing the internal chip operating temperature, and the like. When the functional block is needed again, power must be turned back on and the block must be initialized. Any data or operational settings stored in the functional block are lost when power is disabled.
In some SoC designs, functional blocks that are not used all of the time may be placed into a retention mode. In a retention mode, clock signals to the functional block may be disabled and the power supply to the block may be reduced to a level that allows the block to retain some or all of the operational settings and/or data contained within the block. This may allow some power savings or temperature reduction without a functional block requiring re-initialization when it is needed again. In order to implement a retention mode, a power supply with a voltage level below the main system operating voltage may be required. In addition, it is desirable to implement this power supply with minimal impact to the total chip power consumption.
Power regulation circuits may be designed in accordance with various design styles including passive and active designs. The flexibility to control a voltage output may be provided by using active power regulating circuits. Active power regulating circuits may allow control over the voltage output by monitoring the output and comparing the output to one or more known voltage references. The output may be adjusted higher or lower based on this comparison.
The process of monitoring the output and comparing the output to a known voltage reference may consume power itself and may therefore negate some of the desired power savings and temperature reduction. The monitoring process may be continuous, using analog circuits, such as analog comparators, to compare the output to the voltage reference. This approach may consume power while the power regulating circuit is actively being monitored. Another approach may include using a clocked digital circuit to periodically sample and compare the output. This approach may reduce power consumption by limiting the time spent sampling and comparing the output, but may introduce another source of power consumption to provide a clock signal with a high enough frequency to effectively monitor the output.